Up to recently, the advantage of CISC over RISC has been in instruction density and the speed of that pipeline - and the M1's advantage does not appear to be RISC per se, but the multiple special-purpose cores. I would expect that both intel and AMD are working on specialized cores about now. Gotta wonder how those'll stack up when coupled with an EPIC (explicitly parallel instructions) decoder a la itanium.

BTW/FWIW, intel already has a RISC machine inside each of their CISC processors. There's a decoder that converts CISC into RISC. I expect they're reluctant to expose those 'internal' instructions as they'd lose flexibility for the next generation.

TL;DR: I'd be hesitant to consider intel or AMD as 'down for the count' on this.

Disclaimer: I'm a software guy; what little I understand about processors comes from porting systems level code.